TIE-50506 System Design - spring 2017 

Where to find/submit information in this course

  1. POP for learning event schedule, sign-ups, lecture notes, messages to/from staff
  2. This web page for outline, exercise tasks and instructions
  3. Course reference materials
  4. Web spreadsheed for student group signups (link given by email)
  5. Repolainen exercise submission control and grading system (link given by email)
  6. Version control repositories for files to/from staff (link given by email)
  7. Access right forms are available at Mailbox 150 on C-corridor near Juvenes Zip end of Tietotalo 2nd floor:

Quick guide to submit answers to exercise tasks

  1. Git commit
  2. Git push
  3. Create tag for submission in GitLab
  4. Submit tag to repolainen

Assistants and contacts

Assistants are available on exercise hours. For general questions use POP messages. We discourage email, but if you do, always start the email subject field by TIE-50506 to help sorting it out from junk.

Student groups, access rights and exercise sign-up

The first lecture is compulsory since we form groups of two students there. Everyone who want to take the course must sign the attendance list available in the lecture. If you missed to sign-up in POP you can add yourself on the paper list and sign for committing to take the course.

You should also put your student number in the group list that is available online (link was sent to you by email) and in paper during the lectures. If you don't know a groupmate, start a new group as the first member of it. Finally, the staff will perform random groupings for single students. If you don't know your group members you can take the first contact after the lecture face-to-face or by e.g. wiki in the GitLab system.

There are at least two parallel exercise events per week. Select one event in a week with your groupmate and sign-up in POP. Do not sign up if you don't know if your groupmate can do the same. This is compulsory since we can host only 20 persons per event. Note that you can select different event in different week, and you can continue working on the exercises after the event at your own time any time the room is free.

Important: both students in a group must attend the same exercise event at the same time.

You need access rights to the computer class TC219. Return the application form to mailbox 150 located near the Juvenes Zip end of Tietotalo at 2nd floor. Laboratory Engineer Jari Salo will add access rights usually within couple of days.

Passing the course and exercise rules

Weekly exercises contribute to the final outcome that is a live streaming HEVC video encoder on FPGA platform. Assistants are available for help. The rules are following:
Example (note: points can be different in this course implementation. See Repolainen for real points)
We collect feedback on the difficulty level every week. Please record your time spent on exercises as you were paid for that! In a group of two persons, each member reports his/her personal hours.

Return status

Exercise groups and status are available at Repolainen.

Weekly timetable and tasks

The exercise week in Table = the specific task is handled in all of this week's exercise hours.
The task is published at least one week before this week and its submission deadline is given in repolainen.

Week Lect # Lecture Topic Ex # Ex Topic
2 1 Introduction to embedded system design Getting started with the course infrastructure and materials (self-study)
3 2 System design flow 1 Git training with recommended attendance
4 3 Modelling and simulation 2 Mandatory introduction to Kactus2 and Kvazaar
4 4 Self-study lecture: SystemC tutorial (Watch the  SystemC tutorials before starting Ex 3)
5 5 SoC platforms modeling 3 Communication and computation modelling in SystemC
5 6 Self-study lecture: TLM2.0 modeling in SystemC (See the TLM2.0 tutorials before starting Ex 4)
6 7 Guest lecture 4 Untimed TLM application modeling in SystemC
7 8 FPGA-SoC Platform
8 9 Catapult-C High Level Synthesis demo 5 Get familiar with the FPGA platform
B Bonus exercise: Implementation of kernel module
9 Exam week
10 10 Guest lecture 6 Platform modeling
11 11 Guest lecture 7 TLM level design space exploration
12 12 SoC interconnections 8 HW/SW integration (using accelerator via driver)
13 13 IP-XACT standard ...ex8 continued
14 (No lectures)
9 Complete streaming HEVC encoder
Bonus: HW/SW interfacing (camera driver interrupts)
15 Easter holidays
...ex9 continued
16
(No lectures) ...ex9 continued
17
Mandatory Review and feedback meeting - all staff present 10 Mandatory written report
18 Exam week

The exercise project

We will implement step-by-step an FPGA based HEVC video encoder during the weekly exercises. The image below is an overview of the target system.

The grand focus of the all exercises is not to design a system architecture, but to analyse an existing system and implement or otherwise supplement its missing pieces. Also a lot of different tools are used in the exercises. Aim of all this is to mimic a real world case where you usually do not start from scratch, but adapt to something that already exists.

pic/exercise_work_overview.png